The present invention relates to methods and apparatus for single-ended communication. More particularly, the present invention relates to single-ended signaling from a sending system to a receiving system.
It has been discovered by the inventor that a problem with single-ended signaling for system-to-system or chip-to-chip communications has been the variability of reference voltages used by the sending chip. Because single-ended signaling uses only one signal line to communicate a data signal across a wire, the data signal is sent relative to a reference voltage in the sending chip. The receiving chip then compares the received signal to a reference voltage generated or provided locally to the receiving chip. However, it was discovered by the inventor that one or more reference voltages used by the sending chip may vary over time because of the effects of heat, noise, power surges, and the like. These fluctuations in the reference voltage also appear on the data signal on the signal line. The problem determined by the inventor is that the receiving chip is unaware of the fluctuation in the reference voltage, thus, the data signal received on the signal line may be compared to the wrong reference voltage. Accordingly, the receiving chip may incorrectly interpret the data on the received data signal.
It has also been determined by the inventor that another problem with single-ended signaling is that signals may be voltage offset, or DC biased with respect to the reference voltage. For example, a signal on the signal line which should have voltages ranging from a first voltage to a second voltage may be received by the receiving system as different voltages. As an example, a signal may have a range from 0 to 3.0 volts with respect to a reference voltage of 1.5 volts, however, the receiving system may sense that the signal has a range from 1 to 4.0 volts. Causes of this offset may be due to variations in the characteristics of output drivers on the sending system (chip), noise, distance between the systems, variations in the characteristics of receivers on the receiving system (chip), and the like. These variations typically do not vary with time.
In light of above, the inventor has determined that it is desirable to develop methods and apparatus that address the above problems.
The present invention relates to methods and apparatus for enhanced single-ended signaling communication. More particularly, the present invention relates to single-ended source-synchronous signaling methods and apparatus. The methods and apparatus may include xe2x80x9cmarginingxe2x80x9d techniques for calibrating reference voltages.
According to one aspect of the invention, a method for receiving data from a sending system in a receiving system is disclosed. One method may include receiving a pair of differential clock signals from the sending system, and determining a reference voltage in the receiving system in response to the pair of differential clock signals. Additional steps that may be performed include receiving a test data signal from the sending system, adjusting the reference voltage to form an updated reference voltage in response to the test data signal, and receiving a single-ended data signal from the sending system relative to a reference voltage. The technique may also include determining a data signal in response to the single-ended data signal and to the updated reference voltage.
According to another aspect of the invenion, an apparatus for receiving single-ended data signals and differential data signals from a sending apparatus is disclosed. One system may include a first circuit configured to detennine a reference voltage signal for the single-ended data signals in response to the differential data signals, and a second circuit coupled to the first circuit configured to determine an offset in a received data signal. Another system may also include a third circuit coupled to the first circuit and to the second circuit configured to adjust the reference voltage signal to form a margined reference voltage signal in response to the offset, and a fourth circuit coupled to the second circuit and to the third circuit configured to receive a single-ended data signal and a margined reference voltage and configured to output a data out signal. With such systems, the margined reference voltage is determined in response to the margined reference voltage signal. The system may be a stand alone computer, an integrated circuit, a memory, or the like.
According to yet another aspect of the invention, a system for receiving single-ended signaling data from a sending system is described. One such system may include a voltage generating unit configured to receive a differential clock pair from the sending system, configured to generate a reference voltage in response to the differential clock pair, and configured to generate an adjusted reference voltage, and an adjustment unit coupled to the voltage generating unit configured to determine an offset for the reference voltage and configured to direct the voltage generating unit to generate the adjusted reference voltage in response to the offset. Still other embodiments include a receiver unit coupled to the voltage generating unit and to the adjustment unit configured to receive a single-ended signaling data from the sending system, configured to receive the adjusted reference voltage, and configured to output adjusted data in response to the single-ended signaling data and to the adjusted reference voltage. In such systems, the adjusted reference voltage varies with time.